As the integration density of LSIs increases, the circuit line widths of semiconductor devices become narrower year by year. Forming a desired circuit pattern on a semiconductor device involves using a technique in which a high-precision original pattern (also referred to as a mask, or particularly referred to as a reticule if it is used in a stepper or scanner) formed on a quartz member is transferred in a reduced form onto a wafer using a step-and-repeat exposure system. The high-precision original pattern is drawn by an electron beam drawing apparatus using a so-called electron beam lithography technique.
In electron beam drawing, the layout of a semiconductor integrated circuit is designed, and then layout data (design data) is generated. The layout data is converted to drawing data, which is input to an electron beam drawing apparatus. The electron beam drawing apparatus performs drawing on the basis of the drawing data. For efficient data transfer, the drawing data is defined in a data-compressed format.
For example, Patent Literature 1 (Japanese Unexamined Patent Application Publication No. 2015-95538) proposes a data format of drawing data in which after a plurality of pieces of figure information are defined, dose information of each figure is sequentially defined. Patent Literature 1 also proposes a data format of drawing data whose amount is compressed by using, as dose information of each of the second and succeeding figures, a difference value between the dose of the figure and the dose of the preceding figure.